1. Field of the Invention
The present invention relates generally to plasma etch methods for forming plasma etched layers within microelectronic fabrications. More particularly, the present invention relates to plasma etch methods for forming, with attenuated residue, plasma etched layers within microelectronic fabrications
2. Description of the Related Art
Microelectronic fabrications are formed from microelectronic substrates over which are formed patterned microelectronic conductor layers which are separated by microelectronic dielectric layers.
Common in the art of microelectronic fabrication, for use when fabricating microelectronic fabrications, is the use of plasma etch methods. Such plasma etch methods employ etchant gas compositions which assist in forming from blanket microelectronic layers within microelectronic fabrications plasma etched microelectronic layers within microelectronic fabrications. More typically and preferably, such plasma etch methods employ etchant gas compositions which assist in forming from blanket microelectronic layers within microelectronic fabrications plasma etched patterned microelectronic layers within microelectronic fabrications.
While plasma etch methods are thus desirable and often essential within the art of microelectronic fabrication for fabricating microelectronic fabrications, plasma etch methods are nonetheless not entirely without problems within the art of microelectronic fabrication when fabricating microelectronic fabrications. In that regard, plasma etch methods, and in particular plasma etch methods which employ corrosive etchant gas compositions, such as but not limited to corrosive halogen containing etchant gas compositions such as but not limited to chlorine containing etchant gas compositions and bromine containing etchant gas compositions, often provide when fabricating microelectronic fabrications plasma etched microelectronic layers which suffer from enhanced detrimental residue formation.
It is thus towards the goal of providing for use within the art of microelectronic fabrication when fabricating microelectronic fabrications plasma etch methods which provide plasma etched layers with attenuated residue that the present invention is directed.
Various plasma etch methods having desirable properties and plasma processing apparatus having desirable properties have been disclosed in the art of microelectronic fabrication.
For example, Davis et al., in U.S. Pat. No. 4,657,620, disclose a plasma processing apparatus which provides for enhanced plasma process flexibility and enhanced plasma process uniformity when plasma processing a microelectronic layer within a microelectronic fabrication while employing the plasma processing apparatus. In order to realize the foregoing results, the plasma processing apparatus employs integral with a plasma reactor chamber which comprises the plasma processing apparatus an entry load lock chamber of the plasma processing apparatus and an exit load lock chamber of the plasma processing apparatus, each of which is independently powered such as to allow for either or both of a preprocessing of the microelectronic layer within the entry load lock chamber of the plasma processing apparatus and a post processing of the microelectronic layer within the exit load lock chamber of the plasma processing apparatus, in conjunction with the plasma processing of the microelectronic layer within the plasma reactor chamber of the plasma processing apparatus.
In addition, Kuo in U.S. Pat. No. 5,854,137, discloses a plasma etch method for forming from a blanket polycide layer within a microelectronic fabrication a patterned polycide layer within the microelectronic fabrication, while employing within the plasma etch method a series of etchant gas compositions which in an aggregate comprise sulfur hexafluoride, hydrogen bromide and oxygen, and while attenuating formation of a residue upon the patterned polycide layer which is plasma etched from the blanket polycide layer. In order to realize the foregoing result, the plasma etch method employs a purging of a plasma reactor chamber within which is practiced the plasma etch method with an inert gas subsequent to etching while employing the plasma etch method the blanket polycide layer to form the patterned polycide layer, wherein subsequent to purging the plasma reactor chamber with the inert gas the plasma reactor chamber is evacuated.
Further Brunemeier et al., in U.S. Pat. No. 5,869,401, disclose a plasma processing method for removing from at least either a plasma reactor chamber or a plasma processed microelectronic fabrication which has been plasma processed within the plasma reactor chamber corrosive species which might otherwise contribute to formation of a corrosive residue within the plasma reactor chamber or upon the plasma processed microelectronic fabrication. In order to realize the foregoing result, the plasma processing method employs an oxygen containing plasma for scavenging residual corrosive species from within the plasma reactor chamber or from upon the plasma processed microelectronic fabrication after having formed the plasma processed microelectronic fabrication while employing the plasma processing method.
Finally, Linliu in U.S. Pat. No. 5,924,000 discloses a plasma etch method for forming over a topographic substrate within a microelectronic fabrication a residue free patterned polysilicon containing microelectronic layer through plasma etching of a blanket polysilicon containing microelectronic layer formed over the topographic substrate within the microelectronic fabrication. In order to realize the foregoing result, the plasma etch method comprises a two-step sequential plasma etch method employing: (1) a first plasma employing a first etchant gas composition comprising a chlorine containing etchant species for etching the blanket polysilicon containing microelectronic layer to form the patterned polysilicon containing microelectronic layer and a patterned polysilicon containing layer residue each formed over the topographic substrate; and (2) a second plasma employing a second etchant gas composition comprising an oxygen containing etchant species and a bromine containing etchant species for etching the patterned polysilicon containing layer residue from over the topographic substrate employed within the microelectronic fabrication.
Desirable in the art of microelectronic fabrication are additional plasma etch methods which provide plasma etched layers with attenuated residue.
It is towards the foregoing object that the present invention is directed.
A first object of the present invention is to provide a plasma etch method for plasma etching a microelectronic layer within a microelectronic fabrication to form a plasma etched microelectronic layer within the microelectronic fabrication.
A second object of the present invention is to provide a plasma etch method in accord with the first object of the present invention, where the plasma etch method provides the plasma etched microelectronic layer with attenuated residue.
A third object of the present invention is to provide a plasma etch method in accord with the first object of the present invention and the second object of the present invention, which method is readily commercially implemented.
In accord with the objects of the present invention, there is provided by the present invention a plasma etch method for forming a plasma etched microelectronic layer. To practice the present invention, there is first provided a substrate. There is then formed over the substrate a microelectronic layer. There is then etched within a plasma reactor chamber, and while employing a plasma etch method, the microelectronic layer to form a plasma etched microelectronic layer. Finally, there is then purged the plasma reactor chamber with an inert purge gas, without subsequently evacuating the plasma reactor chamber, prior to removing the substrate from the plasma reactor chamber.
The method of the present invention may alternatively be employed within the context of purging a load lock chamber which is integral with the plasma reactor chamber, rather than purging the plasma reactor chamber, prior to removing from the load lock chamber the substrate having formed thereover the plasma etched microelectronic layer.
There is provided by the present invention a plasma etch method for forming from a microelectronic layer within a microelectronic fabrication a plasma etched microelectronic layer, where the plasma etched microelectronic layer is formed with an attenuated residue. The present invention realizes the foregoing result by employing subsequent to plasma etching within a plasma reactor chamber a microelectronic layer formed over a substrate to form a plasma etched microelectronic layer formed over the substrate a purging of the plasma reactor chamber or a load lock chamber integral to the plasma reactor chamber, without subsequently evacuating the plasma reactor chamber or the load lock chamber integral to the plasma reactor chamber, prior to removing from the plasma reactor chamber or the load lock chamber integral to the plasma reactor chamber the substrate having formed thereover the plasma etched microelectronic layer.
The method of the present invention is readily commercially implemented. The present invention employs methods and materials which are generally known in the art of microelectronic fabrication but employed within the context of a specific ordering to provide the present invention. Since it is a novel ordering of methods and materials which provides at least in part the present invention, rather than the existence of methods and materials which provides the present invention, the method of the present invention is readily commercially implemented.